The present invention relates to a DC link inverter. More particularly, the invention is concerned with a naturally clamped quasi-resonant DC link topology for providing soft switching opportunities for an inverter sourced by the DC link.
Several types and variations of DC link topologies are known. For example, resonant DC links (RDCL) are known which provide zero voltage switching opportunities for the inverter devices. Such topologies provide for soft switching by supplying a continually resonating DC bus voltage. However, such topologies exhibit undesirable characteristics of elevated voltage stresses in the inverter devices of up to approximately two times the unit input voltage of the DC link. This is due to the peak voltages of the resonating DC link of up to approximately two times the unit input voltage of the DC Link. Another topology, the actively clamped resonant DC link (ACRDCL), may reduce these stresses to approximately 1.4 to 1.7 times the unit input voltage but requires a clamping device operative at the resonant frequency--typically an order of magnitude greater than the inverter switching frequency--thereby resulting in significant switching losses. In either the RDCL or ACDCRL topology, a resonant inductor element is required to carry the full load current resulting in massive hardware particularly in high power applications. Furthermore, since the inverter devices switch substantially synchronously with the resonating DC bus, the output of the RDCL or ACRDCL inverter will be an integral multiple of the DC bus pulses thereby limiting current control precision available from such a topology.
Another type of DC link topology includes the auxiliary resonant commutated pole (ARCP). Such a topology comes with significant hardware penalties--most notably as applied to multi-phase systems--owing to the phase dedicated nature of the hardware. In other words, each phase of a multi-phase system requires an identical set of auxiliary switching devices and resonant components dedicated thereto. Control complexity for such topologies correlate positively to the hardware complexity.
Yet another DC link topology includes an auxiliary quasi-resonant DC link (AQRDCL). While certain drawbacks (e.g. high voltage stresses on inverter devices and continuous pulsing DC bus) of the previously mentioned topologies are solved by the AQRDCL topology, such a topology suffers from some characteristic drawbacks. For example, trade-offs among the necessity of maintaining charge balance between DC bus capacitors, minimizing DC bus clamping time and managing current stress on upper clamping devices, especially at low link currents are inevitable unless a split DC input voltage supplies the DC link. It is also necessary that the controller anticipate the future link current after the inverter devices undergo a state change, resulting in additional control complexity. Furthermore, regenerative operation of such topology generally is not considered practical owing to the complexity of associated control.